arc/nps400: New peephole2 pattern allow more cmem loads

Programming / Compilers / GCC - aburgess [138bc75d-0d04-0410-961f-82ee72b054a4] - 17 November 2016 16:40 UTC

In the case where we access a single bit from a value and use this in a EQ/NE comparison, GCC will convert this into a sign-extend and GE/LT comparison.

Normally this would be fine, however, if the value is in CMEM memory, then we don't have a sign-extending load available (using the special short CMEM load instructions), and instead we end up using a long form load with LIMM, which is less efficient.

This peephole optimisation looks for the sign-extend followed by GE/LT pattern and converts this back into a load and EQ/NE comparison.

gcc/ChangeLog:

- config/arc/arc.md (cmem bit/sign-extend peephole2): New peephole to make better use of cmem loads in the case where a single bit is being accessed.
- config/arc/predicates.md (ge_lt_comparison_operator): New predicate.

gcc/testsuite/ChangeLog:

- gcc.target/arc/cmem-bit-1.c: New file.
- gcc.target/arc/cmem-bit-2.c: New file.
- gcc.target/arc/cmem-bit-3.c: New file.
- gcc.target/arc/cmem-bit-4.c: New file.

4ee5a6b arc/nps400: New peephole2 pattern allow more cmem loads
gcc/ChangeLog | 8 ++++++
gcc/config/arc/arc.md | 43 +++++++++++++++++++++++++++++
gcc/config/arc/predicates.md | 3 ++
gcc/testsuite/ChangeLog | 7 +++++
gcc/testsuite/gcc.target/arc/cmem-bit-1.c | 20 ++++++++++++++
gcc/testsuite/gcc.target/arc/cmem-bit-2.c | 20 ++++++++++++++
gcc/testsuite/gcc.target/arc/cmem-bit-3.c | 20 ++++++++++++++
gcc/testsuite/gcc.target/arc/cmem-bit-4.c | 20 ++++++++++++++
8 files changed, 141 insertions(+)

Upstream: gcc.gnu.org

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