google/reef: Configure SDIO D1 to enable SCS Power Gating

Hardware / Coreboot - Jagadish Krishnamoorthy [intel.com] - 8 August 2016 10:37 UTC

SDIO D1 pin needs to be configured as Native mode to enable SCS Power Gating.

BUG=chrome-os-partner:54251 TEST=Verify SCS Power Gating

Change-Id: Ic33b26443203217678e11d195eb965a7e628ad82

5d3d69c google/reef: Configure SDIO D1 to enable SCS Power Gating
src/mainboard/google/reef/gpio.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org

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