google/reef: Remove setting of GPIO_TIER1_SCI enable bit

Hardware / Coreboot - Shaunak Saha [intel.com] - 14 September 2016 18:20 UTC

This patch removes setting of gpio_tier1_sci_en from mainboard smihandler code. Gpio_tier1_sci enable bit is set from gpio.asl now.

BUG=chrome-os-partner:56483 TEST=System resumes from S3 on lidopen, powerbutton and USB wake. Also from S0iX system is resuming for WIFI wake.

Change-Id: I26fd3fd9fcc83c988bcff1bda4da7a2e3da98ce6

b599919 google/reef: Remove setting of GPIO_TIER1_SCI enable bit
src/mainboard/google/reef/smihandler.c | 3 ---
1 file changed, 3 deletions(-)

Upstream: review.coreboot.org

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