skylake: Generate ACPI timing values for I2C devices

Hardware / Coreboot - Duncan Laurie [chromium.org] - 1 July 2016 11:51 UTC

Have the Skylake SOC generate ACPI timing values for the enabled I2C controllers instead of passing it in the DSDT with static timings.

The timing values are generated from the controller clock speed and are more accurate than the hardcoded values that were in the ASL which were originally copied from Broadwell where the controller is running at a different clock speed...

Additionally it is now possible for a board to override the values using devicetree.cb. If zero is passed in for SCL HCNT or LCNT then the kernel will generate its own timing using the same forumla, but if the SDA hold time value is zero the kernel will NOT generate a correct
value and the SDA hold time may be incorrect.

This was tested on the Chell platform to ensure all the I2C devices on the board are still operational with these new timing values.

Change-Id: I4feb3df9e083592792f8fadd7105e081a984a906

222381e skylake: Generate ACPI timing values for I2C devices
src/soc/intel/common/lpss_i2c.c | 44 ++++++++++++++++++++++++++++-
src/soc/intel/common/lpss_i2c.h | 13 ++-------
src/soc/intel/skylake/acpi/serialio.asl | 19 -------------
src/soc/intel/skylake/chip.h | 3 ++
src/soc/intel/skylake/i2c.c | 47 +++++++++++++++++++++++++------
src/soc/intel/skylake/romstage/i2c.c | 14 ++++++++-
6 files changed, 100 insertions(+), 40 deletions(-)

Upstream: review.coreboot.org

  • Share